The MINT backend consists of 2 completely new sub systems, the Channelizer and the Correlator. Both systems represent new directions for the Gravity Group at Princeton. Both State-of-the-Art systems push technologies on many different fronts. The channelizer embodies an integrated philosophy to sub-systems. It is a natural step in the evolution of devices and allows the use of an exploding market of surface-mountable microwave devices in the < 10 GHz regime. The elimination of the inter-device connector and an increase in phase control and stability is the goal of integration.

The correlator, on the other hand, is a complete departure from anything we've done before into the emerging high-frequency electronics field. The digital correlator is the most ambitious single card that the Physics department has ever designed and built. It places an entire 4-telescope, 6 baseline, 2-bit 1GHz processor/digitizer on a single board. The front end of the board has a clock rate of 1GHz and the back end processor is a totally reconfigurable 62.5 MHz Field Programmable Gate Array, which, at the time of the design, was the largest chip available. FPGA's are now a viable alternative to designing and building custom ASIC's for the small quantities market. In the few short months since the initial design, the manufacturer has tripled the size of the largest chip.

People Involved on the Backend

Huan Tran Graduate Student, Princeton University huantran@princeton.edu
Toby Marriage Undergrad, currently GS at Cambridge marriage@alumni.princeton.edu
James Hinderks Undergrad, Currently GS at Stanford

Our very special thanks go to
Andrew Harris, for his discussions and examples of microstrip circuits
David Hawkins who very generously shared his ideas about correlators. Our correlator design was adapted from the new OVRO correlator.